RFX8053

CMOS 5GHz WLAN 802.11ac RFeIC with PA, LNA and SPDT


Please note: RFX8053 is being discontinued and is not recommended for new designs. The suggested replacement is SKY85709-11



RFX8053 is a highly integrated, single-chip, single-die RFeIC (RF Front-end Integrated Circuit) which incorporates key RF functionality needed for IEEE 802.11a/n/ac WLAN system operating in the 5.15-5.825GHz range. The RFX8053 architecture integrates a high-efficiency high-linearity power amplifier (PA), a low noise amplifier (LNA) with bypass, the associated matching network, LO rejection, and harmonic filters all in a CMOS single-chip device.

RFX8053 has simple and low-voltage CMOS control logic, and requires minimal external components. A directional coupler based power detect circuit is also integrated for accurate monitoring of output power from the PA.

RFX8053 is assembled in an ultra-compact low-profile 2.5x2.5x0.45 mm(Max) 16-lead QFN package. With support to direct battery operation, the RFX8053 is ideal RF front-end solution for implementing 5GHz WLAN in smartphones and other mobile platforms.

Specifications

Frequency (GHz) Min.5.15
Replacement Part SKY85709-11
Frequency (GHz) Max.5.85
Typ. Current @ VDD = 3.3 V 17.5dBm (mA)
Typ. Current @ VDD = 3.6 V 17.5dBm (mA)250
Typ. Current @ VCC = 3.6 V (mA)
Typ. POUT @ 3.0% EVM (dBm)
Typ. Current @ VCC = 5 V (mA)
802.11 WLAN Standarda/n/ac
Antenna Ports
Architecture
Typ. POUT @ 2.5% EVM (dBm)
Typ. Tx Gain (dB)29
Typ. POUT (dBm)17 @ -35dB EVM
18.5 @ -30dB EVM
VDD (V)3.3-4.8
VCC (V)
Package
Package (mm)2.5 x 2.5 x 0.45

Features

  • 5GHz WLAN Single Chip, Single-Die RF Front-End IC
  • High Transmit Signal Linearity Meeting Standards for 802.11ac OFDM /MCS9 Modulation
  • Separate TX and RX Transceiver Port and Single Antenna Port
  • 5GHz Power Amplifier with Low-Pass Harmonic Filter
  • Low Noise Amplifier with Bypass Mode
  • Transmit/Receive Switch Circuitry
  • Integrated Power Detector for Transmit Power Monitor and Control
  • Low Voltage (1.2V) CMOS Control Logic
  • ESD Protection Circuitry on All Pins
  • DC Decoupled RF Ports
  • Internal RF Decoupling on All VDD Bias Pins
  • Low Noise Figure for the Receive Chain
  • High Power Capability for Received Signals in Bypass Mode
  • Very Low DC Power Consumption
  • Full On-chip Matching Circuitry
  • Minimal External Components Required
  • 50-Ohm Input / Output Matching
  • Market Proven CMOS Technology
  • 2.5mm x 2.5mm x 0.45mm(Max) Small Outline 16L QFN Package with Exposed Ground Pad

Product Documents